To prepare talent for the country's developing semiconductor ecosystem, the government is equipping more than 100 colleges with electronic design automation tools from Siemens EDA, Synopsys and Cadence.

Training with these tools helps students be industry-ready when they graduate, according to the country heads of these chip design software companies.

Globally, there are only a handful of companies that make these tools and there isn't a single chip that can be designed without their help.

A design-linked incentive scheme for chip startups has been created by Siemens, while Synopsys has partnered with IIT Bombay, Indian Institute of Science, and Jadavpur University to develop talent for the chip industry.

In the meantime, 350 engineering schools in India have access to Cadence's assortment of machine learning and artificial intelligence tools.

Ruchir Dixit, country manager, Siemens EDA that India needs a skilled workforce that can work for the proposed chip units.

More than 100 academic institutions in the country have been equipped with EDA tools from Siemens EDA and others, thanks to the government's Chips to Startups (C2S) initiative.

The C2S initiative, which began in January 2022, aims to educate 85,000 individuals over a five-year period in large-scale integration and embedded system design.

In the first round of the competition, 103 institutions and startups, including the Indian Institutes of Technology at Kanpur, Bombay, Roorkee and Dharwad, had been selected to work on projects such as global navigation receiver SoC for NAVIC and Global Positioning System.

The ministry of electronics and information technology has been working with Siemens to create an EDA tools grid as part of the design-linked incentive scheme for start-ups in the semiconductor and electronic domain.

“We’ve provided our software at a donation price to colleges. This saves colleges the trouble of chasing for these tools individually, and it also allows the suite of tools to train multiple people at the same time,” Dixit says.